Pour error: signals on separate shapes

Upverter Support
#1

We have a couple PCBs that we are working on. We are getting this message: “Pour for net GND on layer Bottom Copper has signals on 5 separate shapes.”

Anyone else experienced this? What is it trying to tell us? What is the fix?
Do we need to fix it to get out a good Gerber file and create a good working PCB?

I thought the error (constraint) was related to pour islands on the bottom, although I have more than 5 islands (the error said '5 separate shapes). But to try something, I used a via to attach one of them to the GND pour on the Top side. When I did this, then my error is for 6 separate shapes, so it seemingly got worse rather than better. So the solution, I assume, must be something else.

I might add, we did not connect some of the ground pins of components to GND before doing the pour. We were relying on the pour to be the GND connections. So maybe these need to be connected first. I don’t know.

#2

Yes this is normal.

It usually occurs when your ground plane is segmented into multiple “islands”, thus breaking your net into multiple pieces -> a big problem.

The solution is to allow your pour space to go around vias and traces. It must flow continuously, no breaks. One easy way to do this is: keep a separate layer for ground only AKA, a ground plane / pour. Then, it will be big block of copper without segmentation.

#3

Hey RobertLengyel,

Thanks for the response for us. The “signals on separate shapes” thing might be ‘normal’, but since we are using upverter for the first time, we didn’t know that the message meant - what are ‘shapes’ for example in the error message.

With your advice and suggestion, we revised the wiring on our board, without moving components around, to remove bottlenecks (and particularly pairs of bottlenecks that caused areas to be isolated) creating ‘islands’ which were then ‘poured’ separate from the rest of the bottom of the PCB. This was the last thing we changed, and after doing this, we re-poured and all our constraints went away.

We are now ready to make our Gerber.

What else did we do, by the way? For awhile we thought the ‘separate shapes’ might be referring to the outline of the PCB. We noticed more than one outline (in light green lines), and we got big yellow dots on the top corners when we hovered the mouse over them. So, I clicked on the yellow dots and got the Pour window, which allowed me to Edit the pour outline. The outline did not start at 0mm-X and 0mm-Y and the corners had different X and Y values. Furthermore, the bottom pour and the top pour had different outlines, and they were different from the mechanical outline. So we fixed this so all of them were the same. This maybe did not fix the problem cited by the constraint message (on separate shapes), but it was a problem that needed to be fixed, nonetheless.

We then searched the PCB for vias and wires to vias that were unnecessary. For example: We added decoupling caps next to the Vss and Vdd pins of components, and in some cases we placed vias next to the ground pin of the caps, and then wired the ground pin to the via (thinking the via would go through to the ground pour, which was GND). When we realized the top pour (to GND) made this unnecessary (b/c that pour would connect to all ground pins everywhere on the Top), we took them out and this made it easier for the top pour to reach all areas on the Top side. We also reduced other wiring by removing things like Grounded-connected pins tied together.

After we did those things, then we moved wires on the Bottom side of the board, and probably 20 vias, in order to open up paths for all areas of the bottom to be poured into one single and large ground plane. In some cases two wires were too close to each other, so by putting more space between them, the pour could fill in the space between them. In most cases, it meant moving a via (and the wire attached to it) that was too close to either another via or a wire. By moving the via (and its wire) we could open a path for the pour to go through those areas (those places that had been bottlenecks).

The pour then went successfully, and our constraints disappeared.

So thanks again for your tip. It pointed us in the right direction.

I provide details, rather than just a thank you here, so the next person who has this problem can find out what to possibly do. I have read a lot of posts in Forums (for car repairs, plumbing issues, now upverter issues) where posters did not post the fix for a problem after they got it fixed, and it would make me go Aargh - it was not useful. So hopefully this can help others.

Last: the constraint message should probably be changed in upverter. If it said the pour had islands, and they must be eliminated, we would have understood what the problem was.

#4

You are welcome. :slight_smile:

Sometimes those constraint warnings are strange, especially for first time users.

Cheers,

#5

Agreed. I suppose every tool and program has its quirks.

I have since found that if I do a pour and I get the message “Pour for net GND on layer Bottom Copper has signals on 5 separate shapes.” (or for Top Copper), one can then go to “Layers,” then select “Bottom Copper” and then on the left side of the screen click on the arrow (top icon on the column - it makes the mouse be a selector) and then click on the PCB’s bottom copper somewhere (to select it), it will change color while the ‘shapes’ will stay the color of bottom copper. By this one can find the islands and then study them to see where wires or vias can be moved so the pour can access the inner parts of the island.

I am still learning.

#6

My bad habit with this DRC error is to treat the islands like individual pours, connect them across layers with vias and turn off the the warning. It makes it electrically correct, but I think it’s bad practice.