We’re getting this error every time we try to draw a pour, no matter what. We’ve even tried doing really trivial GND pours, with a border around just a few vias and a trace to GND and no non-GND vias in the pour area. Have also tried drawing the pour, getting the error, then inspecting the pour and changing the net to GND, then repouring. No good.
Is this a bug in the tool? If not, can someone please explain the error to me? Thanks.
Use the messaging tool to send a message to the staff. That will also send them a link to your current design. The messaging tool is the question mark in the word balloon in the circle in the lower right corner of the screen when you are in the edit tool.
If you turn on all of the constraints, how many constraint violations do you have? I’ve noticed other tools not working when the design was sufficiently confused. I specifically recall that something didn’t work when we had nets connected together, that shouldn’t have been connected. I don’t remember exactly what it was. The message wasn’t anything useful like “net Vcc is connected to net Gnd” it was something totally unrelated to the actual problem. It might even have been the degenerate message that you’re getting. This sort of issue other customers on this very inactive board can help with, if you provide a link to your current design that we can fork and experiment with.
Annoyingly, this sort of net connection can happen if you place a resistor footprint onto the PCB backwards. In the schematic and on the PCB, resistors have a pin 1 and a pin 2. Electrically they may be identical, but a backwards resistor sure breaks a lot of stuff in this tool. In my case, it was a nonpolarized capacitor that got flipped. This confused me for quite a while.
If that isn’t it, my guess is that something else in the design was imported incorrectly, or otherwise got corrupted. The pour logic is stepping through all of the parts to do the pour, and it is failing on the corrupt part. Only Upverter employees can help with this sort of problem. I had a part that imported incorrectly that was breaking something else, and Upverter fixed that issue promptly after I sent them a message.
@StephenHamer explained to me what the error means.
“A pour can fail to generate for a number of reasons. The algorithms that we use to calculate the pour geometry have difficulties when the expanded holes exactly overlap one another. Or where expanded holes exactly overlap the pour outline. Or where the pour intersects itself. The easiest way to try and fix this is to make a small adjustment to the expansion distance. Only a small change is needed, 0.1mm is plenty.”
So, I ran into this problem a whole bunch when I did the intuitive thing, and tried to close the loop (click every corner I wanted, then the starting corner).
Instead, click the corners you want and hit escape before “closing the loop”. It won’t throw the “self intersecting or degenerate” error.
This fixed it for me at least.
I ran into this issue when I was trying to do a pour outside of the board area, moving it back into within the board outlined fixed it for me.
I had an issue with this error for a while — in the end, I had drawn a “board outline” on the Mechanical Details layer of a module in my design rather than on the silkscreen.